Intel developing its own stacked cache tech to compete with AMD 3D V-Cache
Intel is working on its own version of stable cache that AMD pioneered with its 3D V-Cache technology, though it is still at least a couple of generations away.
Following Intel CEO Pat Gelsinger’s Intel Innovation 2023 keynote, Gelsinger held a Q+A session with members of the press where he was asked if Intel would adopt the same stackable cache technology that AMD has been using to make some of the best processors on the market.
“When you reference V-Cache,” Gelsinger said, as reported by Tom’s Hardware, “you’re talking about a very specific technology that TSMC does with some of its customers as well. Obviously, we’re doing that differently in our composition, right? And that particular type of technology isn’t something that’s part of [the new Intel Core Ultra processors], but in our roadmap, you’re seeing the idea of 3D silicon where we’ll have cache on one die, and we’ll have CPU compute on the stacked die on top of it, and obviously using [embedded multi-die interconnect bridges] that Foveros [chiplet packaging technology] we’ll be able to compose different capabilities.”
Anyone who saw Gelsinger’s keynote would have seen how Intel’s upcoming processor roadmap will move heavily into the multi-chiplet module (MCM) design paradigm, where different processor components like the iGPU, cache, and Intel’s new nueral processing unit would be discrete segments bonded together into a single unit rather than cast together all at once.
The MCM process allows for a lot more flexibility than the more restrictive monolithic silicon fabrication that has traditionally been used previously, and would obviously open up all sorts of new possibilities for chip design that weren’t practical using a monolithic structure.
The most obvious of these is stacked cache, which greatly increases the available cache memory pool for the processor that translates into much faster processing of specific CPU workloads.
AMD has already proven the benefits of this expanded cache pool when it launched the AMD Ryzen 7 5800X3D chip in 2022, followed by AMD Ryzen 7 7800X3D, AMD Ryzen 9 7900X3D, and AMD Ryzen 9 7950X3D earlier this year.
“We feel very good that we have advanced capabilities for next-generation memory architectures, advantages for 3D stacking, for both little die, as well as for very big packages for AI and high-performance servers as well,” Gelsinger said. “So we have a full breadth of those technologies. We’ll be using those for our products, as well as presenting it to the [Intel] Foundry customers as well.”
Stackable cache is only the beginning for Intel’s packaging tech
Intel’s move into MCM processor design using its embedded multi-die interconnect bridge (EMIB) and Forveros chip packaging technology is a major step forward for the chipmaker.
The best Intel processors of the past couple of years have relied heavily on simply throwing raw electrical power into its processors to increase performance, making its high-end Intel Core i9-12900K and Intel Core i9-13900K especially power hungry processors.
This has allowed it to regain a lot of ground lost to the best AMD processors of the past few years, but this isn’t a workable long term solution, and even Nvidia is reportedly seeing the wisdom of moving to an MCM design for its next-gen Nvidia Blackwell architecture.
And while the idea of a future Intel processor, possibly as soon as Lunar Lake, featuring stacked cache is exciting, it should only be the beginning of new processor developments, not the end of it.
